SIC Verification Engineer-3221

Remote, HQ in the Philadelphia, PA area

My client is a technology leader delivering high-performance fabrics for High Performance Computing (HPC), High Performance Data Analytics (HPDA), and Artificial Intelligence (AI) for the purpose of delivering interconnect solutions that enable their customers to optimally apply vast computational resources to solve the world’s toughest problems.

Responsibilities
· Participate in development of UVM environments to verify RTL at block, unit, and SoC levels
· Write and execute tests according to verification plans
· Instrument TB for functional and code coverage; collect and analyze coverage results
· Execute formal verification of block level RTL
· Participate in post-silicon verification

Qualifications

Minimum Qualifications:
· B.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
· Experience in one or more Verification languages (UVM, System Verilog)
· Experience in one or more scripting languages (TCL, Python, Perl, Shell-scripting)
· Experience in test bench development
· Prior experience validating complex SoCs that include multiple clock and reset domains
· 3+ years of verification experience

Preferred Qualifications:
· M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
· Track record of first-pass success in ASIC and Systems

Submit resume to: smarts@desgp.com