Logic Design RTL Engineer

P

PDDN INC.

Logic Design RTL Engineer

San Jose, CA
Full Time
Paid
  • Responsibilities

    Job Description

    Role : Logic Design (RTL) Engineer

    Location : San Jose, CA

    Job Type : Contract

    Interview : Phone/Skype

    We are looking for a skilled Logic Design Engineer with expertise in high-performance digital blocks , Verilog/System Verilog coding , and Cadence tools (NCVerilog, NCSIM, Simvision). Experience with sigma-delta ADC , DSP applications , and linting tools (e.g., Spyglass) is highly desirable. Strong analytical, self-motivation, and communication skills are essential.

    #LogicDesignEngineer #RTLDesign #SystemVerilog #DigitalDesign #C2CHiring

  • Qualifications

    Additional Information

    All your information will be kept confidential according to EEO guidelines.