Post Silicon Validation Engineer

P

PDDN INC.

Post Silicon Validation Engineer

San Jose, CA
Full Time
Paid
  • Responsibilities

    Job Description

    Role : Post Silicon Validation Engineer

    Location : San Jose, CA (Hybrid option available)

    Job Type : Contract

    Interview : Phone/Skype

    We are seeking a Post Silicon Validation Engineer with a strong background in SOC/VLSI/Mixed Signal IC bring-up , hardware debugging , and proficiency in Verilog/VHDL , C/C++ , Python , and #silicon validation tools. Responsibilities include test plan development, hardware crafting, production test program release, and collaborating with design teams on innovative IP solutions.

    #PostSiliconValidation #VLSI #Verilog #C++ #Python #SOCValidation #C2CHiring

  • Qualifications

    Additional Information

    All your information will be kept confidential according to EEO guidelines.