Sr. ASIC Design Engineer

S

spacex

Sr. ASIC Design Engineer

Irvine, CA
Paid
  • Responsibilities

    SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

    SENIOR ASIC DESIGN ENGINEER

    RESPONSIBILITIES:

    • As a Senior Design Engineer you’ll help design, implement and verify complex products that use FPGAs and/or ASICs.
    • Participate in the micro architecture and design partition within the ASIC/FPGA.
    • Implement design blocks using Verilog / System Verilog.
    • Work with physical implementation team to address Synthesis, Place & Route, Timing and DFT issues
    • Work with backend teams to address layout and timing issues for ASICs.
    • Bring-up and validate ASICs and FPGAs in the lab.

    BASIC QUALIFICATIONS:

    • Bachelor of Science Degree in computer engineering, electrical engineering or other engineering disciplines.
    • 8+ years of experience working with complex FPGAs and/or ASICs.
    • 8+ years of experience in Verilog / System Verilog and/or VHDL.

    PREFERRED SKILLS AND EXPERIENCE:

    • Master’s degree in engineering or math
    • Familiarity with VHDL is a plus
    • Experience in implementing digital signal processing is preferred
    • Experience with C and C++ programming is desired.
    • ASIC / FPGA / SoC system integration experience.
    • Strong Silicon/ASIC design experience
    • Experience with Verilog and System Verilog.
    • Ability to solve complex problems including clock domain crossings and power optimization.
    • Experience with latest simulation and verification methodologies.
    • Understanding of Datapath Pipelines, State Machines, Arithmetic Operations.
    • Exposure to timing closure techniques.
    • Experience with high reliability design and implementations.
    • Excellent scripting skills (csh/bash, Perl, Python etc.).
    • Experience with EDA tools such as HDL simulators (VCS, Questa, IES), HDL Lint tools (Spyglass), FPGA tools (Xilinx Vivado, Altera Quartus II).
    • Demonstrate the ability to work in a dynamic environment that includes working with changing needs and requirements.
    • Team-player, can-do attitude, works well in a group environment while still being able to contribute on an individual basis, enjoys being challenged, learn new skills.

    ADDITIONAL REQUIREMENTS:

    • Must be available to work extended hours and weekends as needed

    ITAR REQUIREMENTS:

    • To conform to U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about ITAR here.

    SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

    Applicants wishing to view a copy of SpaceX’s Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should notify the Human Resources Department at (310) 363-6000.